SX/B Aliases

SX Registers

SX18 SX20 SX28 SX48 SX52

• IND Indirect Register $00

• RTCC Real Time Clock/Counter $01

• PC Program Counter $02

• STATUS Status Register $03

• PA2 Page Select bit 2 STATUS.7

• PA1 Page Select bit 1 STATUS.6

• PA0 Page Select bit 0 STATUS.5

• TO Time Out STATUS.4

• PD Power Down STATUS.3

• Z Zero STATUS.2

• DC Digit Carry STATUS.1

• C Carry STATUS.0

• FSR File Select Register $04

• RA Port A $05

• RB Port B $06

• RC Port C $07

• RD Port D $08

• RE Port E $09

• RBC Ports B & C as 16-bit entity $06 (LSB) + $07 (MSB)

• RCD Ports C & D as 16-bit entity $07 (LSB) + $08 (MSB)

• RDE Ports D & E as 16-bit entity $08 (LSB) + $09 (MSB)

• PORTA Port A $05

• PORTB Port B $06

• PORTC Port C $07

• PORTD Port D $08

• PORTE Port E $09

• TRIS_A Data Direction register for RA

• TRIS_B Data Direction register for RB

• TRIS_C Data Direction register for RC

• TRIS_D Data Direction register for RD

• TRIS_E Data Direction register for RE

• PLP_A ¹ Pull-Up resistor enable for RA

• PLP_B ¹ Pull-Up resistor enable for RB

• PLP_C ¹ Pull-Up resistor enable for RC

• PLP_D ¹ Pull-Up resistor enable for RD

• PLP_E ¹ Pull-Up resistor enable for RE

• LVL_A ¹ TTL/CMOS select for RA

• LVL_B ¹ TTL/CMOS select for RB

• LVL_C ¹ TTL/CMOS select for RC

• LVL_D ¹ TTL/CMOS select for RD

• LVL_E ¹ TTL/CMOS select for RE

• ST_B ¹ Schmitt-Trigger enable for RB

• ST_C ¹ Schmitt-Trigger enable for RC

• ST_D ¹ Schmitt-Trigger enable for RD

• ST_E ¹ Schmitt-Trigger enable for RE

• WKEN_B ¹ Wake Up enable register

• WKED_B ¹ Wake Up edge select register

• WKPND_B ^{1, 2} MIWU pending register

• CMP_B ^{1, 2} Comparator enable register

• T1CPL Low byte of Timer T1 capture register

• T1CPH High byte of Timer T1 capture register

• T1R1CML Low byte of Timer T1 compare register 1

• T1R1CMH High byte of Timer T1 compare register 1

• T1R2CML Low byte of Timer T1 compare register 2

• T1R2CMH High byte of Timer T1 compare register 2

• T1CNTA Timer T1 control register A

• T1CNTB Timer T1 control register B

• T2CPL Low byte of Timer T2 capture register

• T2CPH High byte of Timer T2 capture register

• T2R1CML Low byte of Timer T2 compare register 1

• T2R1CMH High byte of Timer T2 compare register 1

• T2R2CML Low byte of Timer T2 compare register 2

• T2R2CMH High byte of Timer T2 compare register 2

• T2CNTA Timer T2 control register A

• T2CNTB Timer T2 control register B

• MODE Mode register

• M Mode register

• OPTION Option register

¹ When changed (i.e., Register = Value), the SX/B compiler automatically inserts the correct Mode (M) register instruction.
² When changed (i.e., Register = Variable), Variable is swapped with Register.

SX/B Variables

SX18 SX20 SX28 SX48 SX52

• __RAM() Provides access to any RAM address $00

• __PARAM1 First byte parameter $08 / $0A ^*

• __PARAM2 Second byte parameter $09 / $0B ^*

• __PARAM3 Third byte parameter $0A / $0C ^*

• __PARAM4 Fourth byte parameter $0B / $0E ^*

• __WPARAM12 First word parameter $08,09 / $0A,$0B ^*

• __WPARAM23 Second word parameter $09,$0A / $0B,$0C ^*

• __WPARAM34 Third word parameter $0A,$0B / $0C,$0D ^*

• __REMAINDER Remainder after a division $08 / $0A ^*

• __WREMAINDER Remainder after a division $08,$09 / $0A,$0B ^*

• __PARAMCNT Number of parameters passed to subroutine $0C / $0E ^*

• __INTPARAMFSR Save/Restore location of "M" and __PARAMx $F5

• __TRISA ^† TRIS_A copy $FA

• __TRISB ^† TRIS_B copy $FB

• __TRISC ^† TRIS_C copy $FC

• __TRISD ^† TRIS_D copy $FD

• __TRISE ^† TRIS_E copy $FE

SX/B Constants

SX18 SX20 SX28 SX48 SX52

• __FREQMHZ Frequency (in MHz) as set in FREQ directive.

^* Note: Location depends on module used: SX18/20/28 or SX48/52
^† Note: These registers must not be modified by the programmer, otherwise some SX/B instructions will be adversely affected.

			SX18	SX20	SX28	SX48	SX52
• IND	Indirect Register	$00
• RTCC	Real Time Clock/Counter	$01
• PC	Program Counter	$02
• STATUS	Status Register	$03
• PA2	Page Select bit 2	STATUS.7
• PA1	Page Select bit 1	STATUS.6
• PA0	Page Select bit 0	STATUS.5
• TO	Time Out	STATUS.4
• PD	Power Down	STATUS.3
• Z	Zero	STATUS.2
• DC	Digit Carry	STATUS.1
• C	Carry	STATUS.0
• FSR	File Select Register	$04
• RA	Port A	$05
• RB	Port B	$06
• RC	Port C	$07
• RD	Port D	$08
• RE	Port E	$09
• RBC	Ports B & C as 16-bit entity	$06 (LSB) + $07 (MSB)
• RCD	Ports C & D as 16-bit entity	$07 (LSB) + $08 (MSB)
• RDE	Ports D & E as 16-bit entity	$08 (LSB) + $09 (MSB)
• PORTA	Port A	$05
• PORTB	Port B	$06
• PORTC	Port C	$07
• PORTD	Port D	$08
• PORTE	Port E	$09
• TRIS_A	Data Direction register for RA
• TRIS_B	Data Direction register for RB
• TRIS_C	Data Direction register for RC
• TRIS_D	Data Direction register for RD
• TRIS_E	Data Direction register for RE
• PLP_A ¹	Pull-Up resistor enable for RA
• PLP_B ¹	Pull-Up resistor enable for RB
• PLP_C ¹	Pull-Up resistor enable for RC
• PLP_D ¹	Pull-Up resistor enable for RD
• PLP_E ¹	Pull-Up resistor enable for RE
• LVL_A ¹	TTL/CMOS select for RA
• LVL_B ¹	TTL/CMOS select for RB
• LVL_C ¹	TTL/CMOS select for RC
• LVL_D ¹	TTL/CMOS select for RD
• LVL_E ¹	TTL/CMOS select for RE
• ST_B ¹	Schmitt-Trigger enable for RB
• ST_C ¹	Schmitt-Trigger enable for RC
• ST_D ¹	Schmitt-Trigger enable for RD
• ST_E ¹	Schmitt-Trigger enable for RE
• WKEN_B ¹	Wake Up enable register
• WKED_B ¹	Wake Up edge select register
• WKPND_B ^{1, 2}	MIWU pending register
• CMP_B ^{1, 2}	Comparator enable register
• T1CPL	Low byte of Timer T1 capture register
• T1CPH	High byte of Timer T1 capture register
• T1R1CML	Low byte of Timer T1 compare register 1
• T1R1CMH	High byte of Timer T1 compare register 1
• T1R2CML	Low byte of Timer T1 compare register 2
• T1R2CMH	High byte of Timer T1 compare register 2
• T1CNTA	Timer T1 control register A
• T1CNTB	Timer T1 control register B
• T2CPL	Low byte of Timer T2 capture register
• T2CPH	High byte of Timer T2 capture register
• T2R1CML	Low byte of Timer T2 compare register 1
• T2R1CMH	High byte of Timer T2 compare register 1
• T2R2CML	Low byte of Timer T2 compare register 2
• T2R2CMH	High byte of Timer T2 compare register 2
• T2CNTA	Timer T2 control register A
• T2CNTB	Timer T2 control register B
• MODE	Mode register
• M	Mode register
• OPTION	Option register